The present invention is related to an inductor; and, more particularly, to an area efficient and symmetric multi-layer spiral inductor for use in RF integrated circuits.
Monolithic spiral inductors have been used in many microwave and RF ICs as low noise amplifiers, mixers, voltage controlled oscillators, and so on. The monolithic inductors are utilized to implement on-chip matching networks, passive filters, inductive loads, transformers, baluns, and so on. As silicon technology gradually dominating the RF IC market, the rising demand for high quality monolithic inductors has led to a significant progress in the silicon-based monolithic spiral inductor design techniques.
There is shown in FIG. 1 a layout of a conventional single-layer spiral inductor 10.
As can be seen from the figure, the single-layer spiral inductor 10 is a three-turn inductor which includes an input port 12, a metal line 14 in the form of a spiral, a pair of contacts 16, a bridge metal 17 and an output port 18, wherein one of the contacts 16 is formed at one end of the metal line 14 and the other contact 16 is formed at one end of the output port 18. The contacts 16 are electrically connected to each other through the bridge metal 17, allowing a current inputted to the input port 12 to flow out through the output port 18 after passing through the metal line 14.
One of the major shortcomings associated with the above-described single-layer spiral inductor 10 is the area efficiency. For a given silicon area, the inductance provided from the single-layer spiral inductor is relatively low and to overcome this shortcoming, a dual-layer spiral inductor 20 has been proposed.
There is illustrated in FIG. 2 a conventional dual-layer spiral inductor 20, as further described in Joachim N. Burghartz and Keith A. Jenkins, xe2x80x9cMultilevel-Spiral Inductors Using VLSI Interconnect Technologyxe2x80x9d, IEEE Electron Device Letters, Vol. 17, No. 9, pp. 428-430, September 1996. The dual-layer spiral inductor 20 includes a top and a bottom metal line 24, 25, an input port 22, a contact 26 and an output port 28. As shown in FIG. 2, the top and bottom metal line are in the form of a spiral, each having three turns. The input port 22 is connected to one end of the top metal line 24, and the contact 26, e.g., a via hole, which is formed at the other end of the top metal line 24. The output port 28 is connected to one end of bottom metal line. The bottom metal line 25 is formed on top of the semiconductor substrate, and the top metal line 24 is formed over the bottom metal line 25 with an oxide such as SiO2 filling therebetween.
The top metal line 24 is connected to the bottom metal line 25 through the contact 26, thereby allowing a current inputted to the input port 22 to flow out through the output port 28 after passing through the top and the bottom metal line 24 and 25.
The inductance of the dual-layer spiral inductor 20 described hereinabove is about 4 times that of the single-layer spiral inductor 10 for a given silicon area. However, the dual-layer spiral inductor 20 has a drawback for being asymmetric, causing the inductance at the output port 28 and that at the input port 22 to be different from each other.
It is, therefore, a primary object of the present invention to provide a multi-layer inductor for use in RF integrated circuits which is capable of, as well as having a symmetry for providing same inductance values observed at the input port and the output port thereof, exhibiting a quality factor comparable to or better than that of a conventional single-layer inductor.
In accordance with the present invention, there is provided a symmetric dual-layer spiral inductor incorporating spirals, each having N number of turns, N representing a turn number, being a natural number and greater than 1, comprising: a substrate; a top metal patterned layer provided with a 1st group of N first metal lines and a 2nd group of N second metal lines; a bottom metal patterned layer, disposed between the substrate and the top metal patterned layer, provided with a 1st set of N third metal lines, each corresponding to one of the N first metal lines with the same turn number, and a 2nd set of N fourth metal lines, each corresponding to one of the N second metal lines with the same turn number, each of the metal lines having a 1st and a 2nd end and being decreased in size as the turn number being decreased, the 1st end each first metal line being electrically connected to the 1st end of the corresponding fourth metal line, the 2nd end of the fourth metal line being electrically connected to the 2nd end of the corresponding (nxe2x88x921)th first metal line by descending the turn number thereof from N to 1, the 2nd end of the smallest, i.e., 1st, fourth metal line being connected to that of the smallest, i.e., 1st, third metal line provided that N reaches 1, each of the 1st ends of the third metal lines being electrically connected to the 1st ends of the corresponding second metal lines and the 2nd end of the second metal line being electrically connected to the 2nd end of the corresponding (n+1)st third metal line by rising the turn number thereof from 1 to N; and an insulating material surrounding each of the metal lines.